An increasing need to reduce the number of input/output pins necessary for a programmable logic device (PLD), field programmable gate array (FPGA), ASIC, or other control integrated circuits has been recognized by industry in technical fields relating to digital processors and semiconductor devices. In the semiconductor industry, for example, reducing the number of input/output pins on a semiconductor chip affects physical layout and size of the chip and thus, decreases cost and complexity of the semiconductor chip.
One of the functions of input pins and output pins on an integrated circuit is to control selectable functions of external circuits using binary signals. Selectable functions of external circuits could be anything capable of being turned on or off digitally. Selectable functions include an enable to turn on/off a data buffer, lamp driver, or light emitting diode (LED). Selectable functions could also mean providing a base address for some memory, representing address bits that could be used as a comparator, activating a relay, or opening/closing an actuator.
A traditional technique uses a control chip, e.g., an integrated circuit, in conjunction with a switch circuit to control the selectable functions of an external circuit. FIG. 1 shows an embodiment of a traditional technique. The control chip 10 has a control/data bus 11 that electrically couples the control chip to a controlling processor 12. The control chip has an input pin 13 and an output pin 14. The output pin 14 connects to the control point 15 of an external circuit (not shown). The switch circuit 16 has Vcc connecting to a pull-up resistor, herein depicted as a 10 k ohm resistor, which electrically connects to a switch attached to ground. The input pin of the control chip is connected between the 10 k ohm resistor and the switch.
The controlling processor reads the switch settings through the input pin of the control chip. When the switch setting is open, the input pin is set high or to Vcc. When the switch setting is closed, the input pin is set to a logic zero. The controlling processor can modify the value read from the switch settings using software and output this modified value through the output pin of the control chip to the control point of the external circuit. Alternatively, it can allow the value of the switch setting to flow through the output pin of the control chip to the control point of the external circuit.
Modern computer architecture necessitates that as much circuitry as possible is placed on a semiconductor chip. This goal is often limited by the number of input/output pins on the chip available for routing signals in or out. A large number of input/output pins results in extra complexity. This extra complexity directly translates into a larger budget for the core, more silicon area, and thus more cost. Extra complexity also has an impact on time-to-market. A fundamental problem exists with the traditional technique since two pins, namely an input pin and an output pin are used in conjunction with the switch circuit. It is imperative that the number of input/output pins be reduced on a semiconductor chip to reduce the physical size of the chip and thus reduce cost and complexity. As a result, a need exists to reduce the number of input/output pins on a control chip when used in conjunction with a switch circuit to control selectable functions of an external circuit.